//  Based on https://github.com/nedseb/codal-stm32-iot-node/blob/master/model/STM32IotNodeIO.cpp
/*
  The MIT License (MIT)

  Copyright (c) 2017 Lancaster University.

  Permission is hereby granted, free of charge, to any person obtaining a
  copy of this software and associated documentation files (the "Software"),
  to deal in the Software without restriction, including without limitation
  the rights to use, copy, modify, merge, publish, distribute, sublicense,
  and/or sell copies of the Software, and to permit persons to whom the
  Software is furnished to do so, subject to the following conditions:

  The above copyright notice and this permission notice shall be included in
  all copies or substantial portions of the Software.

  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  DEALINGS IN THE SOFTWARE.
*/

/**
  * Class definition for STM32 Blue Pill I/O.
  * Represents a collection of all I/O pins on the device.
  */

#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
#include <libopencm3/stm32/spi.h>    //  For SPI port definitions e.g. SPI1
#include <libopencm3/stm32/i2c.h>    //  For I2C port definitions e.g. I2C1
#include <libopencm3/stm32/usart.h>  //  For USART port definitions e.g. USART1
#include <libopencm3/stm32/timer.h>  //  For timer port definitions e.g. TIM1
#include "CodalConfig.h"
#include "CmPinMap.h"  //  For PinMap
#include "STM32BluePillIO.h"

using namespace codal;

/**
  * Constructor.
  *
  * Create a representation of all given I/O pins on the edge connector
  *
  * Accepts a sequence of unique ID's used to distinguish events raised
  * by MicroBitPin instances on the default EventModel.
  */
STM32BluePillIO::STM32BluePillIO() :
    // From https://docs.google.com/spreadsheets/d/1yLciHFyPfhRfwEcG3wfqHDgRFa5OoQYTk63bUmTboa8/edit#gid=0

//  Pin Constructors are autogenerated. Do not update here
pa0  (CM_PIN_PA0 , RCC_GPIOA, GPIOA, GPIO0, PIN_CAPABILITY_DIGITAL),
pa1  (CM_PIN_PA1 , RCC_GPIOA, GPIOA, GPIO1, PIN_CAPABILITY_DIGITAL),
pa2  (CM_PIN_PA2 , RCC_GPIOA, GPIOA, GPIO2, PIN_CAPABILITY_DIGITAL),
pa3  (CM_PIN_PA3 , RCC_GPIOA, GPIOA, GPIO3, PIN_CAPABILITY_DIGITAL),
pa4  (CM_PIN_PA4 , RCC_GPIOA, GPIOA, GPIO4, PIN_CAPABILITY_DIGITAL),
pa5  (CM_PIN_PA5 , RCC_GPIOA, GPIOA, GPIO5, PIN_CAPABILITY_DIGITAL),
pa6  (CM_PIN_PA6 , RCC_GPIOA, GPIOA, GPIO6, PIN_CAPABILITY_DIGITAL),
pa7  (CM_PIN_PA7 , RCC_GPIOA, GPIOA, GPIO7, PIN_CAPABILITY_DIGITAL),
pa8  (CM_PIN_PA8 , RCC_GPIOA, GPIOA, GPIO8, PIN_CAPABILITY_DIGITAL),
pa9  (CM_PIN_PA9 , RCC_GPIOA, GPIOA, GPIO9, PIN_CAPABILITY_DIGITAL),
pa10 (CM_PIN_PA10, RCC_GPIOA, GPIOA, GPIO10, PIN_CAPABILITY_DIGITAL),
pa11 (CM_PIN_PA11, RCC_GPIOA, GPIOA, GPIO11, PIN_CAPABILITY_DIGITAL),
pa12 (CM_PIN_PA12, RCC_GPIOA, GPIOA, GPIO12, PIN_CAPABILITY_DIGITAL),
pa15 (CM_PIN_PA15, RCC_GPIOA, GPIOA, GPIO15, PIN_CAPABILITY_DIGITAL),
pb0  (CM_PIN_PB0 , RCC_GPIOB, GPIOB, GPIO0, PIN_CAPABILITY_DIGITAL),
pb1  (CM_PIN_PB1 , RCC_GPIOB, GPIOB, GPIO1, PIN_CAPABILITY_DIGITAL),
pb3  (CM_PIN_PB3 , RCC_GPIOB, GPIOB, GPIO3, PIN_CAPABILITY_DIGITAL),
pb4  (CM_PIN_PB4 , RCC_GPIOB, GPIOB, GPIO4, PIN_CAPABILITY_DIGITAL),
pb5  (CM_PIN_PB5 , RCC_GPIOB, GPIOB, GPIO5, PIN_CAPABILITY_DIGITAL),
pb6  (CM_PIN_PB6 , RCC_GPIOB, GPIOB, GPIO6, PIN_CAPABILITY_DIGITAL),
pb7  (CM_PIN_PB7 , RCC_GPIOB, GPIOB, GPIO7, PIN_CAPABILITY_DIGITAL),
pb8  (CM_PIN_PB8 , RCC_GPIOB, GPIOB, GPIO8, PIN_CAPABILITY_DIGITAL),
pb9  (CM_PIN_PB9 , RCC_GPIOB, GPIOB, GPIO9, PIN_CAPABILITY_DIGITAL),
pb10 (CM_PIN_PB10, RCC_GPIOB, GPIOB, GPIO10, PIN_CAPABILITY_DIGITAL),
pb11 (CM_PIN_PB11, RCC_GPIOB, GPIOB, GPIO11, PIN_CAPABILITY_DIGITAL),
pb12 (CM_PIN_PB12, RCC_GPIOB, GPIOB, GPIO12, PIN_CAPABILITY_DIGITAL),
pb13 (CM_PIN_PB13, RCC_GPIOB, GPIOB, GPIO13, PIN_CAPABILITY_DIGITAL),
pb14 (CM_PIN_PB14, RCC_GPIOB, GPIOB, GPIO14, PIN_CAPABILITY_DIGITAL),
pb15 (CM_PIN_PB15, RCC_GPIOB, GPIOB, GPIO15, PIN_CAPABILITY_DIGITAL),
pc10 (CM_PIN_PC10, RCC_GPIOC, GPIOC, GPIO10, PIN_CAPABILITY_DIGITAL),
pc11 (CM_PIN_PC11, RCC_GPIOC, GPIOC, GPIO11, PIN_CAPABILITY_DIGITAL),
pc12 (CM_PIN_PC12, RCC_GPIOC, GPIOC, GPIO12, PIN_CAPABILITY_DIGITAL),
pd2  (CM_PIN_PD2 , RCC_GPIOD, GPIOD, GPIO2, PIN_CAPABILITY_DIGITAL),
pd3  (CM_PIN_PD3 , RCC_GPIOD, GPIOD, GPIO3, PIN_CAPABILITY_DIGITAL),
pd4  (CM_PIN_PD4 , RCC_GPIOD, GPIOD, GPIO4, PIN_CAPABILITY_DIGITAL),
pd5  (CM_PIN_PD5 , RCC_GPIOD, GPIOD, GPIO5, PIN_CAPABILITY_DIGITAL),
pd6  (CM_PIN_PD6 , RCC_GPIOD, GPIOD, GPIO6, PIN_CAPABILITY_DIGITAL),
pd7  (CM_PIN_PD7 , RCC_GPIOD, GPIOD, GPIO7, PIN_CAPABILITY_DIGITAL),
pd12 (CM_PIN_PD12, RCC_GPIOD, GPIOD, GPIO12, PIN_CAPABILITY_DIGITAL),
pd13 (CM_PIN_PD13, RCC_GPIOD, GPIOD, GPIO13, PIN_CAPABILITY_DIGITAL),
pd14 (CM_PIN_PD14, RCC_GPIOD, GPIOD, GPIO14, PIN_CAPABILITY_DIGITAL),
pd15 (CM_PIN_PD15, RCC_GPIOD, GPIOD, GPIO15, PIN_CAPABILITY_DIGITAL),
ch15         (CM_PIN_TIM_CH15        , RCC_GPIOA, GPIOA, GPIO0, PIN_CAPABILITY_DIGITAL),
ch25         (CM_PIN_TIM_CH25        , RCC_GPIOA, GPIOA, GPIO1, PIN_CAPABILITY_DIGITAL),
ch35         (CM_PIN_TIM_CH35        , RCC_GPIOA, GPIOA, GPIO2, PIN_CAPABILITY_DIGITAL),
ch45         (CM_PIN_TIM_CH45        , RCC_GPIOA, GPIOA, GPIO3, PIN_CAPABILITY_DIGITAL),
ch14         (CM_PIN_TIM_CH14        , RCC_GPIOB, GPIOB, GPIO6, PIN_CAPABILITY_DIGITAL),
ch24         (CM_PIN_TIM_CH24        , RCC_GPIOB, GPIOB, GPIO7, PIN_CAPABILITY_DIGITAL),
ch34         (CM_PIN_TIM_CH34        , RCC_GPIOB, GPIOB, GPIO8, PIN_CAPABILITY_DIGITAL),
ch44         (CM_PIN_TIM_CH44        , RCC_GPIOB, GPIOB, GPIO9, PIN_CAPABILITY_DIGITAL),
ch14_remap   (CM_PIN_TIM_CH14_REMAP  , RCC_GPIOD, GPIOD, GPIO12, PIN_CAPABILITY_DIGITAL),
ch24_remap   (CM_PIN_TIM_CH24_REMAP  , RCC_GPIOD, GPIOD, GPIO13, PIN_CAPABILITY_DIGITAL),
ch34_remap   (CM_PIN_TIM_CH34_REMAP  , RCC_GPIOD, GPIOD, GPIO14, PIN_CAPABILITY_DIGITAL),
ch44_remap   (CM_PIN_TIM_CH44_REMAP  , RCC_GPIOD, GPIOD, GPIO15, PIN_CAPABILITY_DIGITAL),
ch13         (CM_PIN_TIM_CH13        , RCC_GPIOA, GPIOA, GPIO6, PIN_CAPABILITY_DIGITAL),
ch23         (CM_PIN_TIM_CH23        , RCC_GPIOA, GPIOA, GPIO7, PIN_CAPABILITY_DIGITAL),
ch33         (CM_PIN_TIM_CH33        , RCC_GPIOB, GPIOB, GPIO0, PIN_CAPABILITY_DIGITAL),
ch43         (CM_PIN_TIM_CH43        , RCC_GPIOB, GPIOB, GPIO1, PIN_CAPABILITY_DIGITAL),
ch22         (CM_PIN_TIM_CH22        , RCC_GPIOA, GPIOA, GPIO1, PIN_CAPABILITY_DIGITAL),
ch32         (CM_PIN_TIM_CH32        , RCC_GPIOA, GPIOA, GPIO2, PIN_CAPABILITY_DIGITAL),
ch42         (CM_PIN_TIM_CH42        , RCC_GPIOA, GPIOA, GPIO3, PIN_CAPABILITY_DIGITAL),
etr1         (CM_PIN_TIM_ETR1        , RCC_GPIOA, GPIOA, GPIO12, PIN_CAPABILITY_DIGITAL),
ch11         (CM_PIN_TIM_CH11        , RCC_GPIOA, GPIOA, GPIO8, PIN_CAPABILITY_DIGITAL),
ch21         (CM_PIN_TIM_CH21        , RCC_GPIOA, GPIOA, GPIO9, PIN_CAPABILITY_DIGITAL),
ch31         (CM_PIN_TIM_CH31        , RCC_GPIOA, GPIOA, GPIO10, PIN_CAPABILITY_DIGITAL),
ch41         (CM_PIN_TIM_CH41        , RCC_GPIOA, GPIOA, GPIO11, PIN_CAPABILITY_DIGITAL),
bkin1        (CM_PIN_TIM_BKIN1       , RCC_GPIOB, GPIOB, GPIO12, PIN_CAPABILITY_DIGITAL),
ch1n1        (CM_PIN_TIM_CH1N1       , RCC_GPIOB, GPIOB, GPIO13, PIN_CAPABILITY_DIGITAL),
ch2n1        (CM_PIN_TIM_CH2N1       , RCC_GPIOB, GPIOB, GPIO14, PIN_CAPABILITY_DIGITAL),
ch3n1        (CM_PIN_TIM_CH3N1       , RCC_GPIOB, GPIOB, GPIO15, PIN_CAPABILITY_DIGITAL),
tx5          (CM_PIN_UART_TX5        , RCC_GPIOC, GPIOC, GPIO12, PIN_CAPABILITY_DIGITAL),
rx5          (CM_PIN_UART_RX5        , RCC_GPIOD, GPIOD, GPIO2, PIN_CAPABILITY_DIGITAL),
tx4          (CM_PIN_UART_TX4        , RCC_GPIOC, GPIOC, GPIO10, PIN_CAPABILITY_DIGITAL),
rx4          (CM_PIN_UART_RX4        , RCC_GPIOC, GPIOC, GPIO11, PIN_CAPABILITY_DIGITAL),
tx3          (CM_PIN_USART_TX3       , RCC_GPIOB, GPIOB, GPIO10, PIN_CAPABILITY_DIGITAL),
rx3          (CM_PIN_USART_RX3       , RCC_GPIOB, GPIOB, GPIO11, PIN_CAPABILITY_DIGITAL),
ck3          (CM_PIN_USART_CK3       , RCC_GPIOB, GPIOB, GPIO12, PIN_CAPABILITY_DIGITAL),
cts3         (CM_PIN_USART_CTS3      , RCC_GPIOB, GPIOB, GPIO13, PIN_CAPABILITY_DIGITAL),
rts3         (CM_PIN_USART_RTS3      , RCC_GPIOB, GPIOB, GPIO14, PIN_CAPABILITY_DIGITAL),
cts2         (CM_PIN_USART_CTS2      , RCC_GPIOA, GPIOA, GPIO0, PIN_CAPABILITY_DIGITAL),
rts2         (CM_PIN_USART_RTS2      , RCC_GPIOA, GPIOA, GPIO1, PIN_CAPABILITY_DIGITAL),
tx2          (CM_PIN_USART_TX2       , RCC_GPIOA, GPIOA, GPIO2, PIN_CAPABILITY_DIGITAL),
rx2          (CM_PIN_USART_RX2       , RCC_GPIOA, GPIOA, GPIO3, PIN_CAPABILITY_DIGITAL),
ck2          (CM_PIN_USART_CK2       , RCC_GPIOA, GPIOA, GPIO4, PIN_CAPABILITY_DIGITAL),
cts2_remap   (CM_PIN_USART_CTS2_REMAP, RCC_GPIOD, GPIOD, GPIO3, PIN_CAPABILITY_DIGITAL),
rts2_remap   (CM_PIN_USART_RTS2_REMAP, RCC_GPIOD, GPIOD, GPIO4, PIN_CAPABILITY_DIGITAL),
tx2_remap    (CM_PIN_USART_TX2_REMAP , RCC_GPIOD, GPIOD, GPIO5, PIN_CAPABILITY_DIGITAL),
rx2_remap    (CM_PIN_USART_RX2_REMAP , RCC_GPIOD, GPIOD, GPIO6, PIN_CAPABILITY_DIGITAL),
ck2_remap    (CM_PIN_USART_CK2_REMAP , RCC_GPIOD, GPIOD, GPIO7, PIN_CAPABILITY_DIGITAL),
tx1          (CM_PIN_USART_TX1       , RCC_GPIOA, GPIOA, GPIO9, PIN_CAPABILITY_DIGITAL),
rx1          (CM_PIN_USART_RX1       , RCC_GPIOA, GPIOA, GPIO10, PIN_CAPABILITY_DIGITAL),
tx1_remap    (CM_PIN_USART_TX1_REMAP , RCC_GPIOB, GPIOB, GPIO6, PIN_CAPABILITY_DIGITAL),
rx1_remap    (CM_PIN_USART_RX1_REMAP , RCC_GPIOB, GPIOB, GPIO7, PIN_CAPABILITY_DIGITAL),
smbai1       (CM_PIN_I2C_SMBAI1      , RCC_GPIOB, GPIOB, GPIO5, PIN_CAPABILITY_DIGITAL),
scl1         (CM_PIN_I2C_SCL1        , RCC_GPIOB, GPIOB, GPIO6, PIN_CAPABILITY_DIGITAL),
sda1         (CM_PIN_I2C_SDA1        , RCC_GPIOB, GPIOB, GPIO7, PIN_CAPABILITY_DIGITAL),
smbai1_remap (CM_PIN_I2C_SMBAI1_REMAP, RCC_GPIOB, GPIOB, GPIO5, PIN_CAPABILITY_DIGITAL),
scl1_remap   (CM_PIN_I2C_SCL1_REMAP  , RCC_GPIOB, GPIOB, GPIO8, PIN_CAPABILITY_DIGITAL),
sda1_remap   (CM_PIN_I2C_SDA1_REMAP  , RCC_GPIOB, GPIOB, GPIO9, PIN_CAPABILITY_DIGITAL),
scl2         (CM_PIN_I2C_SCL2        , RCC_GPIOB, GPIOB, GPIO10, PIN_CAPABILITY_DIGITAL),
sda2         (CM_PIN_I2C_SDA2        , RCC_GPIOB, GPIOB, GPIO11, PIN_CAPABILITY_DIGITAL),
smbai2       (CM_PIN_I2C_SMBAI2      , RCC_GPIOB, GPIOB, GPIO12, PIN_CAPABILITY_DIGITAL),
nss1         (CM_PIN_SPI_NSS1        , RCC_GPIOA, GPIOA, GPIO4, PIN_CAPABILITY_DIGITAL),
sck1         (CM_PIN_SPI_SCK1        , RCC_GPIOA, GPIOA, GPIO5, PIN_CAPABILITY_DIGITAL),
miso1        (CM_PIN_SPI_MISO1       , RCC_GPIOA, GPIOA, GPIO6, PIN_CAPABILITY_DIGITAL),
mosi1        (CM_PIN_SPI_MOSI1       , RCC_GPIOA, GPIOA, GPIO7, PIN_CAPABILITY_DIGITAL),
nss1_remap   (CM_PIN_SPI_NSS1_REMAP  , RCC_GPIOA, GPIOA, GPIO15, PIN_CAPABILITY_DIGITAL),
sck1_remap   (CM_PIN_SPI_SCK1_REMAP  , RCC_GPIOB, GPIOB, GPIO3, PIN_CAPABILITY_DIGITAL),
miso1_remap  (CM_PIN_SPI_MISO1_REMAP , RCC_GPIOB, GPIOB, GPIO4, PIN_CAPABILITY_DIGITAL),
mosi1_remap  (CM_PIN_SPI_MOSI1_REMAP , RCC_GPIOB, GPIOB, GPIO5, PIN_CAPABILITY_DIGITAL),
nss2         (CM_PIN_SPI_NSS2        , RCC_GPIOB, GPIOB, GPIO12, PIN_CAPABILITY_DIGITAL),
sck2         (CM_PIN_SPI_SCK2        , RCC_GPIOB, GPIOB, GPIO13, PIN_CAPABILITY_DIGITAL),
miso2        (CM_PIN_SPI_MISO2       , RCC_GPIOB, GPIOB, GPIO14, PIN_CAPABILITY_DIGITAL),
mosi2        (CM_PIN_SPI_MOSI2       , RCC_GPIOB, GPIOB, GPIO15, PIN_CAPABILITY_DIGITAL),
nss3         (CM_PIN_SPI_NSS3        , RCC_GPIOA, GPIOA, GPIO15, PIN_CAPABILITY_DIGITAL),
sck3         (CM_PIN_SPI_SCK3        , RCC_GPIOB, GPIOB, GPIO3, PIN_CAPABILITY_DIGITAL),
miso3        (CM_PIN_SPI_MISO3       , RCC_GPIOB, GPIOB, GPIO4, PIN_CAPABILITY_DIGITAL),
mosi3        (CM_PIN_SPI_MOSI3       , RCC_GPIOB, GPIOB, GPIO5, PIN_CAPABILITY_DIGITAL),
nss3_remap   (CM_PIN_SPI_NSS3_REMAP  , RCC_GPIOA, GPIOA, GPIO4, PIN_CAPABILITY_DIGITAL),
sck3_remap   (CM_PIN_SPI_SCK3_REMAP  , RCC_GPIOC, GPIOC, GPIO10, PIN_CAPABILITY_DIGITAL),
miso3_remap  (CM_PIN_SPI_MISO3_REMAP , RCC_GPIOC, GPIOC, GPIO11, PIN_CAPABILITY_DIGITAL),
mosi3_remap  (CM_PIN_SPI_MOSI3_REMAP , RCC_GPIOC, GPIOC, GPIO12, PIN_CAPABILITY_DIGITAL),
led         (CM_PIN_LED        , RCC_GPIOC, GPIOC, GPIO13, PIN_CAPABILITY_DIGITAL)

#ifdef TODO
temperature (CM_PIN_TEMPERATURE, RCC_GPIOADC, GPIOADC, GPIOTEMP, PIN_CAPABILITY_DIGITAL),
vref        (CM_PIN_VREF       , RCC_GPIOADC, GPIOADC, GPIOVREF, PIN_CAPABILITY_DIGITAL),
vbat        (CM_PIN_VBAT       , RCC_GPIOADC, GPIOADC, GPIOVBAT, PIN_CAPABILITY_DIGITAL),
#endif  //  TODO

//  End of autogenerated section
{
}

#define ENDMAP { CM_PIN_NC, CM_PERIPHERAL_NC, 0, CM_PINMODE_NC, CM_PINCNF_NC }

//  From https://docs.google.com/spreadsheets/d/1yLciHFyPfhRfwEcG3wfqHDgRFa5OoQYTk63bUmTboa8/edit#gid=0

//  Pin Map is autogenerated. Do not update here
//  Pin Map is autogenerated. Do not update here

const PinMap PinMap_I2C_SCL[] = { { CM_PIN_I2C_SCL1        , I2C1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SCL[0]
                                            { CM_PIN_I2C_SCL2        , I2C2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SCL[1]
                                            { CM_PIN_I2C_SCL1_REMAP  , I2C1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SCL_REMAP[0]
ENDMAP }; const PinMap PinMap_I2C_SDA[] = { { CM_PIN_I2C_SDA1        , I2C1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SDA[0]
                                            { CM_PIN_I2C_SDA2        , I2C2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SDA[1]
                                            { CM_PIN_I2C_SDA1_REMAP  , I2C1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SDA_REMAP[0]
ENDMAP }; const PinMap PinMap_I2C_SMBAI[] = { { CM_PIN_I2C_SMBAI1      , I2C1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SMBAI[0]
                                            { CM_PIN_I2C_SMBAI2      , I2C2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SMBAI[1]
                                            { CM_PIN_I2C_SMBAI1_REMAP, I2C1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_I2C_SMBAI_REMAP[0]
ENDMAP }; const PinMap PinMap_SPI_MISO[] = { { CM_PIN_SPI_MISO1       , SPI1, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_SPI_MISO[0]
                                            { CM_PIN_SPI_MISO2       , SPI2, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_SPI_MISO[1]
                                            { CM_PIN_SPI_MISO3       , SPI3, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_SPI_MISO[2]
                                            { CM_PIN_SPI_MISO1_REMAP , SPI1, 1, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_SPI_MISO_REMAP[0]
                                            { CM_PIN_SPI_MISO3_REMAP , SPI3, 1, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_SPI_MISO_REMAP[2]
ENDMAP }; const PinMap PinMap_SPI_MOSI[] = { { CM_PIN_SPI_MOSI1       , SPI1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_MOSI[0]
                                            { CM_PIN_SPI_MOSI2       , SPI2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_MOSI[1]
                                            { CM_PIN_SPI_MOSI3       , SPI3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_MOSI[2]
                                            { CM_PIN_SPI_MOSI1_REMAP , SPI1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_MOSI_REMAP[0]
                                            { CM_PIN_SPI_MOSI3_REMAP , SPI3, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_MOSI_REMAP[2]
ENDMAP }; const PinMap PinMap_SPI_NSS[] = { { CM_PIN_SPI_NSS1        , SPI1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_NSS[0]
                                            { CM_PIN_SPI_NSS2        , SPI2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_NSS[1]
                                            { CM_PIN_SPI_NSS3        , SPI3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_NSS[2]
                                            { CM_PIN_SPI_NSS1_REMAP  , SPI1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_NSS_REMAP[0]
                                            { CM_PIN_SPI_NSS3_REMAP  , SPI3, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_NSS_REMAP[2]
ENDMAP }; const PinMap PinMap_SPI_SCK[] = { { CM_PIN_SPI_SCK1        , SPI1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_SCK[0]
                                            { CM_PIN_SPI_SCK2        , SPI2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_SCK[1]
                                            { CM_PIN_SPI_SCK3        , SPI3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_SCK[2]
                                            { CM_PIN_SPI_SCK1_REMAP  , SPI1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_SCK_REMAP[0]
                                            { CM_PIN_SPI_SCK3_REMAP  , SPI3, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_SPI_SCK_REMAP[2]
ENDMAP }; const PinMap PinMap_TIM_BKIN[] = { { CM_PIN_TIM_BKIN1       , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_BKIN[0]
ENDMAP }; const PinMap PinMap_TIM_CH1[] = { { CM_PIN_TIM_CH15        , TIM5, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1[4]
                                            { CM_PIN_TIM_CH14        , TIM4, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1[3]
                                            { CM_PIN_TIM_CH13        , TIM3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1[2]
                                            { CM_PIN_TIM_CH11        , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1[0]
                                            { CM_PIN_TIM_CH14_REMAP  , TIM4, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1_REMAP[3]
ENDMAP }; const PinMap PinMap_TIM_CH1N[] = { { CM_PIN_TIM_CH1N1       , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH1N[0]
ENDMAP }; const PinMap PinMap_TIM_CH2[] = { { CM_PIN_TIM_CH25        , TIM5, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2[4]
                                            { CM_PIN_TIM_CH24        , TIM4, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2[3]
                                            { CM_PIN_TIM_CH23        , TIM3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2[2]
                                            { CM_PIN_TIM_CH22        , TIM2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2[1]
                                            { CM_PIN_TIM_CH21        , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2[0]
                                            { CM_PIN_TIM_CH24_REMAP  , TIM4, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2_REMAP[3]
ENDMAP }; const PinMap PinMap_TIM_CH2N[] = { { CM_PIN_TIM_CH2N1       , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH2N[0]
ENDMAP }; const PinMap PinMap_TIM_CH3[] = { { CM_PIN_TIM_CH35        , TIM5, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3[4]
                                            { CM_PIN_TIM_CH34        , TIM4, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3[3]
                                            { CM_PIN_TIM_CH33        , TIM3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3[2]
                                            { CM_PIN_TIM_CH32        , TIM2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3[1]
                                            { CM_PIN_TIM_CH31        , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3[0]
                                            { CM_PIN_TIM_CH34_REMAP  , TIM4, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3_REMAP[3]
ENDMAP }; const PinMap PinMap_TIM_CH3N[] = { { CM_PIN_TIM_CH3N1       , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH3N[0]
ENDMAP }; const PinMap PinMap_TIM_CH4[] = { { CM_PIN_TIM_CH45        , TIM5, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4[4]
                                            { CM_PIN_TIM_CH44        , TIM4, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4[3]
                                            { CM_PIN_TIM_CH43        , TIM3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4[2]
                                            { CM_PIN_TIM_CH42        , TIM2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4[1]
                                            { CM_PIN_TIM_CH41        , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4[0]
                                            { CM_PIN_TIM_CH44_REMAP  , TIM4, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_CH4_REMAP[3]
ENDMAP }; const PinMap PinMap_TIM_ETR[] = { { CM_PIN_TIM_ETR1        , TIM1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_TIM_ETR[0]
ENDMAP }; const PinMap PinMap_UART_RX[] = { { CM_PIN_UART_RX5        , UART5, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_UART_RX[4]
                                            { CM_PIN_UART_RX4        , UART4, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_UART_RX[3]
ENDMAP }; const PinMap PinMap_UART_TX[] = { { CM_PIN_UART_TX5        , UART5, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_UART_TX[4]
                                            { CM_PIN_UART_TX4        , UART4, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_UART_TX[3]
ENDMAP }; const PinMap PinMap_USART_CK[] = { { CM_PIN_USART_CK3       , USART3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CK[2]
                                            { CM_PIN_USART_CK2       , USART2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CK[1]
                                            { CM_PIN_USART_CK2_REMAP , USART2, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CK_REMAP[1]
ENDMAP }; const PinMap PinMap_USART_CTS[] = { { CM_PIN_USART_CTS3      , USART3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CTS[2]
                                            { CM_PIN_USART_CTS2      , USART2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CTS[1]
                                            { CM_PIN_USART_CTS2_REMAP, USART2, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_CTS_REMAP[1]
ENDMAP }; const PinMap PinMap_USART_RTS[] = { { CM_PIN_USART_RTS3      , USART3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_RTS[2]
                                            { CM_PIN_USART_RTS2      , USART2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_RTS[1]
                                            { CM_PIN_USART_RTS2_REMAP, USART2, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_RTS_REMAP[1]
ENDMAP }; const PinMap PinMap_USART_RX[] = { { CM_PIN_USART_RX3       , USART3, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_USART_RX[2]
                                            { CM_PIN_USART_RX2       , USART2, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_USART_RX[1]
                                            { CM_PIN_USART_RX1       , USART1, 0, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_USART_RX[0]
                                            { CM_PIN_USART_RX2_REMAP , USART2, 1, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_USART_RX_REMAP[1]
                                            { CM_PIN_USART_RX1_REMAP , USART1, 1, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT },  //  PinMap_USART_RX_REMAP[0]
ENDMAP }; const PinMap PinMap_USART_TX[] = { { CM_PIN_USART_TX3       , USART3, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_TX[2]
                                            { CM_PIN_USART_TX2       , USART2, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_TX[1]
                                            { CM_PIN_USART_TX1       , USART1, 0, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_TX[0]
                                            { CM_PIN_USART_TX2_REMAP , USART2, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_TX_REMAP[1]
                                            { CM_PIN_USART_TX1_REMAP , USART1, 1, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL },  //  PinMap_USART_TX_REMAP[0]


//  End of autogenerated section
ENDMAP };
